Quantum Control Hardware
Certified Company ISO 9001-2008
- Project Team:Gang Huang, Yilun Xu
- Start Date:October 2018
- Status:Single qubit characterization demonstrated on the rev. 1 evaluation boards board based prototype chassis. Two qubit gates optimization under progress.
- Presentation:2019, 2020 APS March Meeting
Project Description
Quantum bits communicate with the classical world through an electrical-magnetic field at different frequency ranges, from DC to microwave RF to modulated laser. These electronics are called qubit control hardware. As the number of qubits increases, the qubit control hardware becomes another bottleneck limiting the system scalability.
Most of the current quantum bit control systems are utilizing advanced control instrumentation developed for general control purposes, including Arbitrary Waveform Generator, Digitizing cards etc. Since the system was not specifically optimized for the qubit control purpose, it is hard to expand the system to the scale needed for the future quantum computers.
In this project, we combine the domain specific knowledge for quantum control and the available and value engineered technology together to develop a scalable and cost effective solution for the NISQ stage qubit control. We also expect the solution can be flexible enough to follow the ever developing technology and adopt for the future quantum computing system requirement.
What we did
To meet the requirements of Advanced Quantum Testbed, we develop the control system from two parallel approaches:
1. Develop full stack in-house solutions to demonstrate the advanced qubit control features.
A FPGA based qubit control system is developed to demonstrate the functionality and scalability for the superconducting qubit control. The system requires technology and engineering from RF circuits development, FPGA gateware development, structure and thermal engineering, python API and GUI development to quantum gate analysis.
- Evaluation board based FPGA and ADC/DAC as rev. 1 prototype system
- Portable verilog/system verilog code implemented basic features, including parameterized pulse generation and synchronized signal detection
- Low noise local oscillator generation and distribution together with low noise up/down converter modules provide compact analog ends with comparable noise performance
- Python scripts developed as software API to demonstrate qubit control functionality
- Developed scripts to implemented full single qubit characteristics protocols, including pulse alignment, VNA, Punchout, VNA qubit, Chevron pattern, Rabi oscillation, T1 measurement, Ramsey experiment, Spin-echo experiment, Gate optimization, All XY experiments to Single qubit randomized benchmarking.
- Characterize RF crosstalk parameters and compensate it using adjacent wires
- Support integrating Zurich instrument hardware stack with qubit
2. Adopt the industrial leading solutions to support the early experiments as quickly as possible.
Current Status & Next Steps
Based on the Rev 1 prototype hardware, we implemented single qubit characterization and gate optimization protocol. The test on the superconducting qubit demonstrated comparable gate fidelity (99.7%) with the commercial AWG etc. Fast reset feature has been implemented in gateware level to achieve low latency. We are working on optimizing a two-qubit gate and measuring its fidelity. The web based GUI is under development to improve the user experience.
Looking forward, we expect to continue upgrading the gateware and hardware to reflect the new feature requirement and lesson learned from the experiment experience. In particular, we will develop the fiber based synchronization among FPGAs, explore low latency DAC and RFSoC solutions.